Dr. Pravanjan Samanta
Electronics & Communication Engineering | ECE
Assistant Professor
Area of Specialization
Logic design using Memristor (VLSI design)
Teaching Experience
4 years 6 months
Research Experience
7 years 6 months
Academic Qualifications
Ph.D.: IIT KHARAGPUR, 2024
PG: M.E. (CONTROL SYSTEM ENGINEERING) IN JADAVPUR UNIVERSITY, 2015
UG: BTECH (ECE) IN KALYANI GOVT. ENGINEERING COLLEGE, 2008
Date of Joining 22-07-2024
Logic design using Memristor (VLSI design)
Journal Publications:
- P. Samanta, D. N. Yadav, P. P. Das, I. Sengupta, “An efficient read approach for memristive crossbar array”, Memories-Materials, Devices, Circuits and Systems, vol 4, (2023), 100047.
Conference Publications:
- P. Samanta, S. Mitra, G. Das, Construction of a reduce order observer for linear time invariant system with unknown inputs, in: “Proceedings of the 2015 Third International Conference on Computer, Communication, Control and Information Technology (C3IT)”, IEEE, 2015, pp. 1–4.
- Y. K. Y. Danaboina, P. Samanta, K. Datta, I. Chakrabarti, I. Sengupta, “Design and implementation of threshold logic functions using memristors”, in: “2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID)”, IEEE, 2019, pp. 518–519.